Ghala Buarish

After KAUST Academy

Ghala is in the senior year of an Electrical and Computer Engineering degree at NYU Tandon School of Engineering. In summer 2026, Ghala worked at CERN on FPGA acceleration of a CMS reconstruction algorithm for the High-Luminosity LHC upgrade.

Summer project

Artificial Intelligence Specialization · Cohort 2025

Sparse Matrix Vector Multiplication (SpMV) on FPGA Using High-Level Synthesis

Accelerating Sparse Matrix-Vector Multiplication (SpMV) on FPGA hardware using High-Level Synthesis (HLS). Multiple storage formats (CSR, COO, and ELLPACK) were implemented in C/C++ with Vitis HLS, synthesized into IPs, and deployed on the HyperFPGA cluster for large-scale testing. The different methods were evaluated by correctness validation, resource utilization, and time performance under optimization directives (pipelining, unrolling, and streaming). CSR achieved the best balance of speed and memory efficiency, COO provided simplicity but higher memory cost, and ELL predictable memory access lead to a competitive computation time. Taken together, results show that FPGA-based SpMV is an effective and scalable solution that can exceed CPU baselines in accelerating sparse computations in high-performance applications.

Mentor: Maynor Ballina and Romina Molina

Read the final report (PDF)

See it in the program report (PDF)

With KAUST Academy

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